There is a push in the semiconductor industry towards semiconductor devices (e.g., metal-oxide semiconductor, MOS, transistor devices) that have gate electrodes with different work functions and a gate dielectric layer having a high dielectric constant (e.g., dielectric constant, k, of greater than 4). Unfortunately, the existing candidate high-k dielectric layers have a number of problems. The problems include poor reliability, channel mobility degradation, insufficiently high k value, and contamination issues, depending on the precursor used.
Accordingly, what is needed is a material and method for fabricating high-k gate dielectric layer that addresses the drawbacks of the prior art methods and devices.